Digital Electronics MCQs with answers for IIT JAM 2022

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Here is a compilation of Free  Digital Electronics MCQs  for practice . It  consists of IIT JAM Physics Multiple Choice Questions from the topic Digital Electronics with Answer Key. These questions can be very useful for the preparation of all the competitive examinations in Physics / Physical Sciences such as IIT JAM, BHU, JNU, DU, HCU and other University M.Sc Entrance Examinations . So, HERE you can test yourself.

Digital Electronics MCQs with answers 2022 for IIT JAM, BHU, JNU, DU, HCU and other University M.Sc Entrance Examinations

Digital Electronics MCQs with answers 2022 for IIT JAM, BHU, JNU, DU, HCU and other University M.Sc Entrance Examinations

We have compiled the Digital Electronics MCQs with answers 2022 for the Candidates / Students who are preparing for IIT JAM, CSIR JRF NET, GATE and other University M.Sc & Ph.D Entrance Examinations. Practice  Digital Electronics MCQ (Multiple Choice Questions) with Answers which is very important for students who want to score good marks in their respective examinations

There are some Digital Electronics MCQs with answers given  below So , attempt these  MCQs and test yourself ….

1. Using the laws of Boolean algebra, the Boolean expression AB + (A+B)(B+C) can be simplified to

(a) A – BC
(b) B + AC
(c) C + AB
(d) AB + AC

Answer

Answer: (b)


2. Which of the following gates is known as equality comparator?

(a) AND gate
(b) OR gate
(c) XNOR gate
(d) XOR gate

Answer

Answer: (c)


3. 10101 binary number corresponds to decimal number

(a) 31
(b) 21
(c) 11
(d) 3

Answer

Answer: (b)


4. The unique output for a NAND logic gate is a 0 :

(a) when all inputs are 0
(b) when all inputs are 1
(c) when any one input is 0
(d) when any one input is 1

Answer

Answer: (b)


5. Bubbled (inputs inverted) OR gate is equivalent to

(a) NOR gate
(b) NAND gate
(C) NOT gate
(d) XNOR gate

Answer

Answer: (b)


6. The minimum number of two input NAND gates required to realize the function of 3 input OR gate is

(a) 4
(b) 5
(C) 6
(d) 3

Answer

Answer: (d)


7. A bubbled (input inverted) OR gate is equivalent to

(a) NOR gate
(b) NAND gate
(c) NOT gate
(d) XNOR gate

Answer

Answer: (d)


8. The most suitable gate for comparing two bits is

(a) AND
(b) OR
(C) NAND
(d) X-OR

Answer

Answer: (c)


9. Which of the following gates cannot be used as an inverter ?

(a) NAND
(b) AND
(C) NOR
(d) X-NOR

Answer

Answer: (b)


10. How many NOR gates are required to obtain AND operation ?

(a) 2
(b) 3
(c) 4
(d) 1

Answer

Answer: (a)


11. Which of the following is a universal gate ?

(a) OR gate
(b) NOR gate
(c) AND gate
(d) NOT gate

Answer

Answer: (b)


12. Consider a Boolean Expression F = (B + BC)(B + B’C)(B + D) The minimum number of NAND gates required to implement this ‘F’ will be

(a) 0
(b) 2
(c) 3
(d) 4

Answer

Answer: (a)


13. The number of comparators in a 4-bit flash A to D converter is

(a) 4
(b) 5
(c) 15
(d) 16

Answer

Answer: (c)


14. The minimum number of storage elements needed for the designing of a bi-stable multivibrator is:

(a) 0
(b) 1
(c) 2
(d) 3

Answer

Answer: (b)


15. The functional difference between SR flip-flop and JK flip-flop is that

(a) JK flip-flop has a feedback path
(b) JK flip-flop can accept both inputs as 1
(c) JK flip-flop does not require an external clock pulse
(d) JK flip-flop is faster than SR flip-flop

Answer

Answer: (b)


16. The 2’s complement of the binary number 1101100 in BCD is

(a) 12
(b) 13
(c) 14
(d) 15

Answer

Answer: (c)


17. A master-slave flip-flop has the characteristic that

(a) change in the input at Master’ is immediately reflected in the output of Slave’.
(b) input states of both the ‘Master’and ‘Slave’ are affected at the same time.
(c) change in the output of “Slave” follows the change in output of ‘Master’.
(d) output states of both the ‘Master’ and ‘Slave’ are affected at the same time

Answer

Answer: (c)


18. The decimal equivalent of the hexadecimal number (A3B)16 is

(a) (2361)10
(b) (2621)10
(c) (2619)10
(d) (2879)10

Answer

Answer: (c)


19. The resolution of an n-bit D to A converter (DAC) using resistive ladder network is:

(a) 1/2n
(6) 1/2n-1
(c) 1/2n-1
(d) 1/2n+1

Answer

Answer: (c)


20. In a 4-bit serial-in-parallel-out shift register, the outputs QD, QC, QB and QA of respective D Flip-Flops are initially in the state 1010. A binary sequence 0101 is applied to the input of the first D-flip-flop (having output QD). After two clock pulses, the values of output QD QC QB QA of the shift register will be:

(a) 1001
(b) 0100
(c) 0110
(d) 1010

Answer

Answer: (c)


Hope the information shed above regarding  Digital Electronics MCQs with answers 2022 for IIT JAM, BHU, JNU, DU, HCU and other University M.Sc Entrance Examinations  . If you have any other queries , feel free to reach us so that we can revert back to us at the earliest possible.

And if any answer is wrong then feel free to correct us 🤗.

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Advantages of practicing MCQs QUESTIONS

  • By  practicing  the Questions from any practice book  or online HERE or  last years questions Papers,  you’ll  be  able  to understand  the  Syllabus  and  Pattern of the respective exam.
  • By solving the Problems / Questions, you’ll find an idea about the questions that what kind of questions were asked and what kind of questions can be asked.
  • Also By continuous practicing of  the  Problems , you’ll be able to  rectify your sharpness, accuracy, capacity  and  also time management skills.

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